Power Electronics: A Complete Guide from First Principles

Introduction

Power electronics is the use of solid-state switching devices to convert and control electrical power. It covers everything from the milliwatt converter in a wearable to the gigawatt converters in HVDC transmission. Nearly every modern electrical system now has a power electronic stage: phone chargers, LED lamps, laptops, air conditioners, electric vehicles, solar inverters, wind turbines, data centres, elevators, trains, and the grid itself.

The field rests on one idea, switching. A transistor operated as a switch is either fully on (high current, almost no voltage across it) or fully off (high voltage, almost no current). In both states the power dissipated in the device, V × I, is close to zero. Because the device rarely sits in the lossy middle region, conversion efficiencies of 90–99% are routine.

This article covers the principles, devices, converter topologies, passive components, control, power quality, applications, protection and reliability, with worked examples and a formula sheet at the end.

Part 1: Fundamentals

1.1 What is power electronics?

A power electronic system takes electrical power in one form and delivers it in another form, with the output controlled to suit the load. There are four basic conversions:

Conversion	Circuit name	Examples
AC → DC	Rectifier (converter)	Battery chargers, DC drives, HVDC receiving end
DC → DC	Chopper / DC-DC converter	Phone charger output stage, EV auxiliary supply, MPPT stage
DC → AC	Inverter	Solar inverters, motor drives, UPS
AC → AC	AC controller, cycloconverter, matrix converter	Dimmers, soft starters, very-low-speed drives

Real systems chain these. A variable-frequency drive is AC → DC → AC. An EV fast charger is AC → DC → DC.

1.2 Why not use linear regulators?

A linear regulator drops the surplus voltage across a transistor working in its resistive region. Converting 48 V to 12 V at 5 A this way wastes (48 − 12) × 5 = 180 W, for an efficiency of only 25%. A switching converter doing the same job typically reaches 95% or better, wasting about 3 W. Low loss brings smaller heat sinks, less cooling, longer battery life, and higher power density.

Switching has costs too: electrical noise (EMI), harmonics, control complexity, and stress on the devices.

1.3 Block structure of a power electronic system

Power stage: switches, diodes, inductors, capacitors, transformers.
Gate drive: amplifies and isolates control signals.
Sensing: voltage, current, temperature, position or speed.
Controller: analogue IC, microcontroller, DSP, or FPGA that generates switching signals.
Protection: overcurrent, overvoltage, overtemperature, undervoltage lockout.
Filters and EMI suppression on the input and output.

1.4 The ideal switch and what limits it

The ideal switch has zero on-resistance, infinite off-resistance, zero switching time, no drive power, and unlimited voltage and current. Real devices have:

On-state voltage drop or resistance (conduction loss).
Finite leakage when off.
Finite switching times (switching loss).
Limited voltage, current, and frequency capability.
Parasitic capacitances and inductances that cause ringing and overshoot.

Much of the field is the study of these compromises.

1.5 Key definitions used throughout

For a periodic waveform f(t) with period T:

Average: F_avg = (1/T) ∫ f(t) dt
RMS: F_rms = √[(1/T) ∫ f²(t) dt]
Form factor: FF = F_rms / F_avg
Ripple factor: RF = √(FF² − 1)
Duty cycle: D = t_on / T

Two more terms recur:

Power factor: PF = P/S = (displacement factor) × (distortion factor).
Total harmonic distortion: THD = √(I_rms² − I₁²) / I₁.

1.6 Short history

1900s–1950s: mercury-arc rectifiers and thyratrons handled early high-power conversion (traction, HVDC pioneering).
1957: General Electric introduces the silicon controlled rectifier (thyristor), and the modern field begins.
1970s: power BJTs and power MOSFETs appear.
1980s: the IGBT combines MOSFET drive with bipolar conduction.
1990s onward: MOSFET and IGBT modules, integrated drivers, and digital control mature.
2010s onward: silicon carbide (SiC) and gallium nitride (GaN) devices become commercial and reshape the field.

Part 2: Power Semiconductor Devices

2.1 Classification

By controllability:

Uncontrolled: diodes. State set by the circuit.
Semi-controlled: thyristors (SCR), TRIACs. Can be turned on by a gate pulse, but turn off only when current falls to zero.
Fully controlled: BJT, MOSFET, IGBT, GTO, IGCT. Turned on and off by the gate.

By drive type:

Current-controlled: BJT, thyristor, GTO. They need substantial gate current.
Voltage-controlled: MOSFET, IGBT. Gate is capacitive, so drive power is small.

By carrier type:

Unipolar (only majority carriers): Schottky diode, MOSFET. Fast, low switching loss.
Bipolar (both carriers): PN diode, BJT, thyristor, IGBT. Low conduction loss at high voltage, but stored charge slows switching.

2.2 Power diodes

A power diode conducts when forward biased and blocks when reverse biased. Unlike a signal diode, it has a lightly doped, thick drift region that supports high reverse voltage.

Forward drop: ~0.7–1.5 V for silicon PN diodes.
Reverse recovery: when a conducting diode is suddenly reverse biased, stored charge Q_rr must be swept out first. Current briefly flows backwards for a time t_rr. This causes switching loss, voltage spikes, and EMI.

Type	Features	Typical use
General-purpose	Slow (t_rr of several µs), high current	50/60 Hz rectification
Fast/ultrafast recovery	t_rr tens to hundreds of ns	Freewheeling, output rectifiers
Schottky (Si)	~0.3–0.5 V drop, no stored charge, low voltage (≤ ~200 V), leakage	Low-voltage output rectifiers
SiC Schottky	No reverse recovery, 650 V–3.3 kV	PFC boost diodes, high-frequency converters

2.3 Thyristor (SCR)

A thyristor has four layers (P-N-P-N), three terminals (anode, cathode, gate), and three junctions.

Operating modes:

Reverse blocking: anode negative, blocks reverse voltage.
Forward blocking: anode positive, no gate pulse, blocks.
Forward conduction: turned on by a gate pulse (or exceeding breakover voltage, excessive dv/dt, high temperature, or light in LASCRs). Once on, the thyristor latches and the gate loses control.

Key parameters:

Latching current: the minimum anode current needed to stay on after the gate pulse ends.
Holding current: the minimum anode current below which it turns off.
Turn-off time (t_q): the time after current reaches zero before forward voltage can be reapplied without re-triggering. Typically 10–200 µs.
di/dt and dv/dt ratings: limits on rate of current rise (hot spots) and voltage rise (false triggering). They are handled with series inductors and RC snubbers.

Turn-off (commutation):

Natural (line) commutation: the AC supply reverses and drives current to zero. Used in phase-controlled rectifiers and AC controllers.
Forced commutation: an auxiliary LC circuit forces current to zero in DC circuits. It is obsolete because fully controlled devices now do this more simply.

Thyristors still dominate the highest power applications (HVDC converters, large motor starters, SVCs) with ratings of up to about 8 kV and several kA per device.

Related devices:

TRIAC: bidirectional thyristor for AC control (dimmers, fan regulators, small heaters).
DIAC: trigger device used with TRIACs.
GTO: thyristor that can be turned off with a large negative gate current. It has high gate drive requirements and has been largely replaced.
IGCT: hard-driven GTO with a very low-inductance gate unit, used in medium-voltage drives.

2.4 Power BJT

A bipolar junction transistor controlled by base current. It has low on-state drop at high voltage but low current gain, needs continuous base drive, has slow switching, and is prone to secondary breakdown. It has been largely replaced by MOSFETs and IGBTs.

2.5 Power MOSFET

The workhorse below ~600 V (and up to ~900 V for superjunction types).

Structure: vertical (VDMOS, trench) design. Current flows from drain (bottom) to source (top). It is normally an n-channel enhancement device: a positive gate voltage above the threshold V_th forms a channel.

Characteristics:

Voltage-controlled: gate draws current only while charging its capacitance.
Conduction: behaves as a resistor R_ds(on), so P_cond = I²·R_ds(on). R_ds(on) rises steeply with voltage rating (roughly ∝ BV^2.5 for conventional silicon) and increases with temperature. This positive temperature coefficient makes paralleling easy.
Body diode: an intrinsic reverse diode, slow in silicon, fast in SiC.
Capacitances: C_gs, C_gd (Miller), C_ds. Datasheets give C_iss, C_oss, C_rss.
Gate charge (Q_g): the practical measure of drive requirement. Driving loss P_g = Q_g · V_gs · f_s.
Miller plateau: during switching, gate voltage flattens while C_gd is charged or discharged. This is where the drain voltage swings.

Very fast switching (tens of ns) makes MOSFETs ideal for 20 kHz to several MHz.

2.6 IGBT

The Insulated Gate Bipolar Transistor combines a MOSFET input stage with a bipolar output stage.

Drive: voltage-controlled (typically +15 V on, 0 to −15 V off).
Conduction: the bipolar action injects carriers into the drift region (conductivity modulation), so V_CE(sat) is around 1.5–3 V and stays low even at high voltage ratings.
Switching: turn-off shows a tail current from stored charge, which limits frequency. IGBTs are typically used up to ~20–50 kHz (higher in some fast versions).
Ratings: 600 V to 6.5 kV, up to kA in modules.
Latch-up (parasitic thyristor) is avoided by design in modern devices.

IGBTs dominate medium- to high-power converters: motor drives, EV traction inverters, UPS, renewable inverters, welders.

2.7 Wide-bandgap devices (SiC and GaN)

Silicon’s limits (bandgap of 1.12 eV) constrain high-voltage, high-frequency, high-temperature operation. Wide-bandgap semiconductors have bandgaps around 3.3–3.4 eV and about ten times the critical electric field of silicon. They allow thinner drift layers, so lower resistance for a given voltage.

Property	Si	SiC (4H)	GaN
Bandgap (eV)	1.12	~3.26	~3.4
Critical field (relative to Si)	1×	~10×	~10×
Thermal conductivity	Good	Excellent (~3× Si)	Moderate
Typical voltages	up to ~900 V (MOSFET), kV (IGBT)	650 V–3.3 kV+	100–650 V
Structure	Vertical	Vertical MOSFET	Lateral HEMT

SiC MOSFETs offer much lower switching loss than Si IGBTs at high voltage, so they are used in EV inverters, fast chargers, solar, and industrial drives. They typically need 15–20 V gate drive and often a small negative turn-off voltage.

GaN HEMTs switch extremely fast with very low gate charge and no reverse-recovery loss. They are used in compact chargers, data-centre power supplies, and totem-pole PFC. They have no body diode (reverse conduction is via the channel) and need careful layout and drive.

WBG devices switch at high dV/dt and dI/dt, so parasitic inductance and EMI become critical design issues.

2.8 Device comparison

Device	Voltage range	Current	Frequency	Drive	Typical use
Thyristor	up to 8 kV	very high	line frequency	current pulse	HVDC, large rectifiers
GTO/IGCT	3–6 kV	kA	100s Hz–1 kHz	high current / hard drive	MV traction, drives
IGBT	0.6–6.5 kV	up to kA (modules)	up to ~50 kHz	voltage	Drives, inverters
Si MOSFET	20–900 V	up to 100s A	100 kHz–MHz	voltage	SMPS, low-voltage DC-DC
SiC MOSFET	0.65–3.3 kV+	up to 100s A	50 kHz–MHz	voltage (15–20 V)	EV, solar, chargers
GaN HEMT	0.1–0.65 kV	tens of A	up to several MHz	voltage (5–6 V)	Chargers, DC-DC, servers

Part 3: Practical Device Considerations

3.1 Power losses in a switch

Conduction loss:

MOSFET: P_cond = I_rms² · R_ds(on)
IGBT/diode: P_cond ≈ V_on · I_avg + R_d · I_rms²

Switching loss (hard switching, linear approximation):

P_sw ≈ ½ · V · I · (t_r + t_f) · f_s

plus losses from C_oss energy (½ C_oss V² per cycle) and diode reverse recovery.

Gate-drive loss: P_g = Q_g · V_gs · f_s.

Trade-off: raising the switching frequency shrinks inductors, capacitors, and transformers but raises switching loss. Faster devices (WBG) move the optimum toward higher frequency.

3.2 Gate drive design

A gate driver supplies the current needed to charge and discharge gate capacitance quickly, with correct voltage levels and often galvanic isolation.

Isolation: optocouplers, magnetic (transformer) or capacitive isolators, or pulse transformers.
High-side drive: bootstrap circuits (simple, limited duty), isolated DC-DC supplies, or charge pumps.
Gate resistor R_g: trades switching speed against dV/dt, ringing, and EMI. Separate turn-on and turn-off resistors are common.
Dead time: in a half-bridge, a delay between turning one switch off and the other on prevents shoot-through (both on, shorting the DC bus).
Miller clamp / negative bias: prevents parasitic turn-on caused by dV/dt through C_gd.
Desaturation detection: senses V_CE (or V_DS) during on-state to catch short circuits.
UVLO: disables switching if the drive supply is too low (an under-driven device dissipates heavily).

3.3 Snubbers and parasitics

Stray inductance in wiring and packages produces overshoot: V = L · di/dt. Countermeasures:

Compact, low-inductance layout and laminated busbars.
RC snubbers across switches (damp ringing) or RCD snubbers (clamp overshoot).
Soft-switching to avoid the problem altogether (see 5.9).
Slower gate drive where efficiency allows.

3.4 Thermal management

Heat is the main limit on power density. Junction temperature is found from the thermal resistance chain:

T_j = T_a + P_loss · (R_θjc + R_θcs + R_θsa)

where R_θjc is junction-to-case, R_θcs is case-to-sink (thermal interface material), and R_θsa is sink-to-ambient.

For short pulses, the transient thermal impedance Z_θ(t) applies, since the silicon’s thermal mass absorbs brief overloads. Practical measures:

Heat sinks, forced air, liquid cooling, heat pipes, cold plates.
Derating: keep T_j well below the rated maximum (often 150–175 °C for Si, 175–200 °C for SiC).
Stay inside the safe operating area (SOA).

3.5 Packaging

Discrete packages (TO-220, TO-247, surface-mount) suit up to a few kW. Power modules (half-bridge, six-pack, integrated power modules with drivers) suit kW to MW. Press-pack devices suit the highest power and provide short-circuit-failure-to-short behaviour. Low parasitic inductance is a key module design goal, especially for SiC.

Part 4: AC-DC Converters (Rectifiers)

4.1 Uncontrolled single-phase rectifiers

Half-wave (resistive load):

V_dc = V_m/π, V_rms = V_m/2, FF = 1.57, RF = 1.21, PIV = V_m

Poor utilisation, and the transformer sees DC. Rarely used beyond tiny loads.

Full-wave (centre-tap or bridge):

V_dc = 2V_m/π ≈ 0.637 V_m, V_rms = V_m/√2, FF = 1.11, RF = 0.482

The bridge needs four diodes, no centre tap, and PIV = V_m.

A capacitor filter raises V_dc toward V_m but makes current flow in narrow, high-peak pulses near the voltage peak. This gives a poor power factor (~0.5–0.7) and high THD, which is the origin of the PFC requirement in Part 10.

4.2 Phase-controlled single-phase rectifiers

Replacing diodes with thyristors and delaying firing by firing angle α controls output voltage.

Half-controlled / full-controlled bridge, resistive load:

V_dc = (V_m/π)(1 + cos α) (fully controlled, R load, discontinuous)

Fully controlled bridge with highly inductive load (continuous, ripple-free current):

V_dc = (2V_m/π) cos α

α from 0° to 90°: V_dc positive, rectifier mode (power flows AC → DC).
α from 90° to 180°: V_dc negative. With a DC source that keeps current flowing (e.g., a motor being regenerated), power flows DC → AC. This is inverter mode (line-commutated).

Two-quadrant operation of a full converter gives simple DC-motor drives with regeneration.

Input power factor with large load inductance: the source current is a square wave in phase with cos α displacement, so

displacement factor = cos α, distortion factor = 2√2/π ≈ 0.9, PF ≈ 0.9 cos α

The PF falls as α increases, a key drawback of phase control.

4.3 Three-phase rectifiers

Uncontrolled six-pulse bridge:

V_dc = (3√2/π) · V_LL,rms ≈ 1.35 V_LL

Output ripple is at 6× line frequency, so filtering is easy. Input current has harmonics at 6k ± 1 (5th, 7th, 11th, 13th, …).

Fully controlled six-pulse bridge (continuous current):

V_dc = (3√2/π) · V_LL · cos α

Source inductance effect (commutation overlap): finite source inductance L_s stops current from switching instantly, causing an overlap angle μ and a voltage reduction:

ΔV = (3ωL_s/π) · I_d (six-pulse bridge)

Also, when a controlled rectifier inverts, α must stay below 180° − (μ + γ) to leave a margin angle γ for turn-off time. Otherwise commutation failure occurs.

Twelve-pulse rectifiers use two six-pulse bridges fed by 30°-shifted supplies (delta/star transformer secondaries), cancelling the 5th and 7th harmonics. They are used in high-power industrial and HVDC applications.

4.4 Active front ends

Replacing diodes/thyristors with IGBT/SiC bridges gives a PWM rectifier: bidirectional power flow, near-unity power factor, sinusoidal currents (low THD), and controllable DC-link voltage. It is used in regenerative drives, EV chargers, and grid-tied converters. It requires an input inductor (or LCL filter) and boost operation (DC-link voltage above the peak of the line-line voltage).

Part 5: DC-DC Converters

5.1 Basic principles

A DC-DC converter switches an input at frequency f_s = 1/T with duty cycle D, and an LC filter smooths the result. Two principles underpin steady-state analysis:

Volt-second balance: the average voltage across an inductor over a cycle is zero.
Charge (amp-second) balance: the average current through a capacitor over a cycle is zero.

Conduction modes:

CCM (continuous conduction mode): inductor current never reaches zero.
DCM (discontinuous conduction mode): inductor current falls to zero for part of the cycle.
BCM/CrCM: the boundary between them.

5.2 Buck converter (step-down)

Switch in series with an inductor, freewheeling diode (or synchronous switch) across the input side.

V_o = D · V_in
ΔI_L = V_o (1 − D) / (L · f_s)
ΔV_o ≈ ΔI_L / (8 · f_s · C)
L_crit = (1 − D) R / (2 f_s)

The input current is pulsating (needs an input capacitor), but the output current is smooth. Synchronous buck replaces the diode with a MOSFET to eliminate the diode drop, which gives excellent efficiency at low output voltages (point-of-load regulators for CPUs).

5.3 Boost converter (step-up)

Inductor at the input, switch to ground, diode to output.

V_o = V_in / (1 − D)
ΔI_L = V_in · D / (L · f_s)
ΔV_o ≈ I_o · D / (f_s · C)
L_crit = D(1 − D)² R / (2 f_s)

Input current is smooth (good for PV and PFC), output current is pulsating. Gain rises steeply as D → 1, but real losses limit practical gain to roughly 4–5× in a simple boost.

5.4 Buck-boost converter (inverting)

V_o = −V_in · D / (1 − D)

Output can be above or below the input in magnitude, and it is inverted in polarity. Both input and output currents are pulsating.

5.5 Ćuk, SEPIC and Zeta

Ćuk: V_o = −V_in · D/(1 − D). Continuous current at both input and output (low ripple), with energy transferred through a capacitor.
SEPIC: V_o = V_in · D/(1 − D), non-inverting, with continuous input current.
Zeta: non-inverting, with continuous output current.

They are useful when the input may be above or below the output (battery-powered systems).

5.6 Discontinuous conduction mode

At light load, inductor current can reach zero. Then the voltage gain depends on the load. With K = 2L/(R·T):

Buck: M = V_o/V_in = 2 / (1 + √(1 + 4K/D²))
Boost: M = (1 + √(1 + 4D²/K)) / 2

DCM has easier diode turn-off (no reverse-recovery current) but higher peak currents and a control-to-output response that changes with mode.

5.7 Isolated converters

Isolation provides safety, ground-loop separation, and large voltage ratios via a high-frequency transformer (much smaller than a 50 Hz one, since size ∝ 1/f).

Topology	Gain (N = N_s/N_p)	Notes	Typical power
Flyback	V_o = N · V_in · D/(1 − D)	Buck-boost with a coupled inductor. Simple, low cost, energy stored in the gap	up to ~100–150 W
Forward	V_o = N · D · V_in	Needs a reset winding or clamp; D < 0.5 with simple reset	100–500 W
Push-pull	V_o = N · 2D · V_in	Centre-tapped primary; risk of core saturation from flux imbalance	100 W–1 kW
Half-bridge	V_o = N · D · V_in (D ≤ 0.5 per switch)	Blocking capacitor prevents DC saturation	200 W–1 kW+
Full-bridge	V_o = N · 2D · V_in	Best transformer utilisation; phase-shift control allows soft switching	1 kW–several kW

5.8 Bidirectional converters

Replacing the diode with an active switch gives bidirectional power flow, needed for battery storage, EV chargers, and regenerative systems. The Dual Active Bridge (DAB) is the leading isolated bidirectional topology. Two H-bridges are coupled through an inductor and a high-frequency transformer, with power controlled by the phase shift between the two bridges.

5.9 Soft switching and resonant converters

Hard switching wastes energy every cycle and generates EMI. Soft switching shapes voltage and current so that switching occurs when one is near zero:

ZVS (zero-voltage switching): the switch turns on when its voltage is zero.
ZCS (zero-current switching): the switch turns off when its current is zero.

Resonant and quasi-resonant converters include series-resonant, parallel-resonant, and LLC converters. The LLC (resonant tank with two inductors and one capacitor) controls its output by varying frequency and achieves ZVS over a wide range. It is widely used in server supplies, TV/LED supplies, and EV chargers, often reaching 96–98% efficiency.

Phase-shifted full bridge (PSFB) gives ZVS through transformer leakage inductance.

Part 6: DC-AC Converters (Inverters)

6.1 Types

Voltage-source inverters (VSI): a DC-link capacitor holds a stiff voltage. Nearly all modern inverters are VSIs.
Current-source inverters (CSI): a DC-link inductor holds a stiff current. Used in some high-power drives and HVDC (LCC).

6.2 Single-phase inverters

Half-bridge: two switches and a split DC source or capacitors. The output swings ±V_dc/2.

Full-bridge (H-bridge): four switches. The output can be +V_dc, 0, or −V_dc.

Square-wave operation: the fundamental rms is V_o1 = (4/π)(V_dc/√2) ≈ 0.9 V_dc, with odd harmonics of amplitude 1/n. The output is rich in low-order harmonics, so filtering is impractical, which motivates PWM.

6.3 Three-phase inverters

Six switches in three legs. Each leg’s output is either the positive or negative DC rail.

Six-step (180° conduction) operation:

Line-to-line fundamental: V_LL1 = (√6/π) V_dc ≈ 0.78 V_dc.
Line-to-line total RMS = √(2/3) V_dc ≈ 0.816 V_dc.
Harmonics at 6k ± 1 (5th, 7th, 11th, 13th).

Rules: never turn on both switches in the same leg together (shoot-through), and include dead time.

6.4 Pulse-width modulation (PWM)

PWM shifts the harmonics to high frequency (around the carrier frequency), where a small filter can remove them, and it permits control of both amplitude and frequency of the output.

Sinusoidal PWM (SPWM): compare a sinusoidal reference at f₁ with a triangular carrier at f_s.

Amplitude modulation index: m_a = V_ref,peak / V_carrier,peak.
Frequency modulation ratio: m_f = f_s / f₁.
Linear range: m_a ≤ 1. Then each phase-leg output (relative to the DC midpoint) has a fundamental peak of m_a · V_dc/2, and line-to-line rms is:

V_LL,rms = (√3/(2√2)) · m_a · V_dc ≈ 0.612 · m_a · V_dc

Overmodulation (m_a > 1) increases output but adds low-order harmonics; the limit is six-step (0.78 V_dc).
Dominant harmonics appear around m_f and multiples (sidebands). For three-phase, choose m_f odd and a multiple of 3 for good symmetry.

Space vector PWM (SVPWM): treats the three-phase voltage as a rotating vector, synthesised from the two adjacent active vectors and zero vectors in each sector. It gives about 15.5% higher maximum output than SPWM (linear range up to V_LL,rms = V_dc/√2 ≈ 0.707 V_dc), lower current ripple, and easy digital implementation. It is equivalent to SPWM with third-harmonic injection.

Other schemes: selective harmonic elimination (SHE), hysteresis current control, model predictive control (MPC), and discontinuous PWM (reducing switching loss by clamping one phase).

6.5 Multilevel inverters

For medium and high voltage, one device cannot withstand the whole DC-link voltage. Multilevel inverters synthesise the output from several voltage levels, giving lower harmonics, lower dV/dt, and lower switching stress.

Neutral-point-clamped (NPC/diode-clamped): three levels are common; the neutral-point voltage needs balancing.
Flying-capacitor: clamping capacitors, no diodes, but more capacitors to pre-charge and control.
Cascaded H-bridge: series-connected isolated H-bridge cells; n cells produce 2n + 1 levels.
Modular multilevel converter (MMC): the dominant topology for VSC-HVDC, built from many series submodules.

6.6 Output filtering and dead-time effects

LC / LCL filters remove switching harmonics. LCL filters are standard for grid-tied inverters because of their good attenuation with smaller magnetics.
Dead time distorts the output voltage (depending on current polarity), so drives use dead-time compensation.

6.7 Grid-connected inverters

A grid-tied inverter must synchronise with the grid using a phase-locked loop (PLL), regulate current in a synchronous (dq) reference frame, and meet grid codes: harmonic limits (IEEE 519, IEC 61727/61000), anti-islanding, low-voltage ride-through, and reactive power support (IEEE 1547, IEC standards). Modern “grid-forming” inverters set voltage and frequency themselves, which is important as inverter-based sources replace synchronous generators.

Part 7: AC-AC Converters

7.1 AC voltage controllers

Back-to-back thyristors (or a TRIAC) between an AC source and load control the RMS voltage without changing frequency.

Phase control (single-phase, resistive load):

V_o,rms = V_s · √[ (1/π) · (π − α + sin(2α)/2) ]

Used in dimmers, fan regulators, heaters, and soft starters for induction motors. Drawbacks: harmonics and lagging displacement PF.

Integral-cycle (on-off) control: whole cycles are passed or blocked: V_o,rms = V_s · √(k/n) for k of n cycles conducting. There are no harmonics but flicker and subharmonics limit it to thermal loads.

7.2 Cycloconverters

A cycloconverter converts AC directly to a lower-frequency AC (typically up to about one-third of the input frequency) using phase-controlled converters in anti-parallel. Historically used in very large low-speed drives (cement mills, mine winders, ship propulsion), it has largely been replaced by multilevel VSI drives.

7.3 Matrix converters

A matrix converter uses a 3×3 array of bidirectional switches to connect any input phase to any output phase, with no DC-link capacitor. It offers regeneration and near-sinusoidal input/output currents but has a maximum voltage ratio of 0.866, complex commutation, and a more difficult protection scheme.

7.4 Common DC-link systems

Most AC-AC conversion today is AC → DC → AC with a DC link. A variable-frequency drive (VFD) uses a diode rectifier, DC-link capacitor, and PWM inverter. Regenerative versions replace the diode bridge with an active front end.

Part 8: Passive Components and Magnetics

8.1 Inductors

Design equations:

V = L · di/dt, Energy = ½ L I², L = N² / R_reluctance = μ N² A_c / l_path

Design constraints: the core must not saturate (B_max below the saturation flux density), the winding must fit the window, and the losses (core and copper) must allow acceptable temperature rise.

Core materials:

Material	Features	Frequency range
Silicon steel	High B_sat (~1.5–2 T), high loss at frequency	50/60 Hz, low kHz
Powdered iron / sendust / high-flux	Distributed gap, soft saturation	Up to 100s of kHz
Ferrite (MnZn)	Low loss, low B_sat (~0.3–0.5 T)	20 kHz to MHz
Amorphous / nanocrystalline	High B_sat, low loss	kHz to 100s of kHz, medium power

Air gaps store energy in inductors and prevent saturation; fringing flux near gaps adds eddy-current loss in nearby windings.

8.2 Transformer design at high frequency

Following the EMF equation V = 4.44 f N B_m A_c (sine) or V = 4 f N B_m A_c (square wave), higher frequency allows fewer turns or a smaller core. Design steps: choose core and B_max, compute turns, choose wire, check window fill, compute core and copper losses, check temperature rise, and minimise leakage inductance (or use it deliberately, as in resonant and DAB topologies).

8.3 Skin and proximity effects

At high frequency, current crowds toward the conductor surface. The skin depth is:

δ = √(ρ / (π f μ)) (≈ 66 / √f mm for copper at 20 °C, f in Hz)

At 100 kHz, δ ≈ 0.2 mm, so thick round wire wastes copper. Solutions: Litz wire (many fine insulated strands), copper foil, and planar (PCB) windings. Proximity effect (eddy currents induced by neighbouring conductors’ fields) can be even worse in multilayer windings, so interleaving and layer limits matter.

8.4 Capacitors

Type	Strengths	Weaknesses	Typical use
Aluminium electrolytic	High capacitance per cost	High ESR, wears out (lifetime roughly halves per +10 °C)	DC link, bulk
Film (polypropylene)	Low ESR, high ripple current, self-healing	Larger, lower capacitance	DC link in EV/solar, snubbers
Ceramic (MLCC)	Very low ESR/ESL, small	DC bias reduces capacitance, cracking, microphonics	Decoupling, output filters
Supercapacitor	Very high energy density	Low voltage	Energy buffering

Key parameters: ESR (causes heating and output ripple), ESL, ripple-current rating, voltage derating, and lifetime.

8.5 Resistors and other components

Current-sense shunts (low inductance), NTC/PTC thermistors for inrush limiting, varistors (MOVs) and TVS diodes for surge protection, and fuses.

Part 9: Control of Power Converters

9.1 Why control is needed

Converters must hold outputs steady despite changes in input voltage (line regulation), load (load regulation), and component drift, and must respond quickly to transients while remaining stable.

9.2 Modelling

Switching converters are nonlinear and time-varying. State-space averaging or averaged-switch models produce a continuous small-signal model around an operating point.

For an ideal buck converter, the control-to-output transfer function is:

G_vd(s) = V_in / (1 + s·L/R + s²·L·C)

with a resonance at ω₀ = 1/√(LC), where the double pole causes a 180° phase drop.

The boost and buck-boost converters in CCM have a right-half-plane (RHP) zero at ω_z = R(1 − D)²/L (boost). It limits the achievable control bandwidth, typically to less than about one-fifth of the RHP zero frequency, and it gives a “wrong-way” initial response.

9.3 Control modes

Voltage-mode control: the output voltage error adjusts D directly. It is simple, but the response is slower and it has no inherent current limit.

Current-mode control: an inner loop regulates inductor (or switch) current and an outer loop sets its reference. Benefits include a simpler plant (the inductor becomes a controlled current source), inherent cycle-by-cycle current limiting, and easier paralleling. Peak current-mode control needs slope compensation to prevent sub-harmonic oscillation when D > 0.5.

Other techniques: average current control (PFC), hysteresis/bang-bang, hysteretic COT (constant on-time), sliding-mode, model predictive control, and digital predictive control.

9.4 Compensators

Designers typically want a loop gain with high DC gain (small steady-state error), a crossover frequency of about one-tenth to one-fifth of the switching frequency (or below the RHP zero), and phase margin of 45–60°.

Type I: integrator only.
Type II: integrator plus one zero/pole pair (used with current-mode control).
Type III: two zeros and extra poles (used with voltage-mode control to cancel the LC double pole).
PI/PID controllers are the digital equivalents.

9.5 Digital control

Microcontrollers, DSPs, and FPGAs offer flexibility, complex algorithms, communications, and diagnostics. Design considerations:

ADC sampling synchronised with PWM (usually at the middle of the on or off time to avoid switching noise).
Computation delay and sampling delay, which reduce phase margin.
Quantisation and limit cycling.
Discretisation (Tustin, ZOH) of continuous compensators.

9.6 Control of specific systems

Battery charging: constant-current, then constant-voltage (CC-CV).

Maximum power point tracking (MPPT) for solar: perturb-and-observe or incremental conductance keeps the PV array at the peak of its P–V curve.

Grid-tied inverters: cascaded loops (outer DC-link voltage or power loop, inner current loop in the dq frame) with a PLL for synchronisation.

Motor drives:

V/f control: keep the voltage-to-frequency ratio constant to maintain flux. Simple, open loop, and used for pumps and fans.
Field-oriented control (FOC / vector control): transform three-phase currents by the Clarke (abc → αβ) and Park (αβ → dq) transformations so that flux (i_d) and torque (i_q) are controlled independently, like a separately excited DC motor.
Direct torque control (DTC): hysteresis regulation of torque and flux with a switching table, giving fast torque response.
BLDC/PMSM drives: commutation from Hall sensors, back-EMF, or sensorless observers.

Part 10: Power Quality, Power Factor Correction and EMI

10.1 Harmonics and power factor

Non-linear loads (rectifiers with capacitor filters, phase-controlled loads) draw non-sinusoidal current. With V sinusoidal:

PF = cos φ₁ × (I₁ / I_rms), with distortion factor = 1/√(1 + THD²)

The consequences are extra losses in cables and transformers, neutral-current overloading in three-phase four-wire systems (triplen harmonics add in the neutral), resonance with capacitor banks, and interference with other equipment.

Standards: IEC 61000-3-2 (equipment up to 16 A per phase) and IEEE 519 (system-level limits).

10.2 Power factor correction (PFC)

Passive PFC: a line-frequency inductor or filter. It is simple but bulky, and gives modest improvement.

Active PFC: a high-frequency converter (usually boost) shapes the input current to follow the input voltage. The controller has an outer voltage loop (regulating the DC bus) and an inner current loop that makes the current proportional to the instantaneous input voltage.

CCM: low peak current, higher-power designs.
BCM/CrCM: variable frequency, ZCS-like turn-on, common up to a few hundred W.
Interleaved boost PFC: phases shifted to cancel ripple and share power.
Totem-pole bridgeless PFC: removes the input diode-bridge losses. Practical with GaN and SiC, reaching >99% efficiency.

Active PFC achieves PF > 0.99 and THD < 10%.

10.3 Filters for grid harmonics

Passive tuned filters: series LC branches at 5th, 7th, and so on.
Active power filters: inject compensating currents to cancel load harmonics.
Multipulse rectifiers and active front ends at the source.

10.4 Electromagnetic interference (EMI)

Fast switching edges (high dv/dt and di/dt) generate noise.

Conducted EMI travels on wires:

Differential mode (DM): flows out on one line and back on the other (from ripple current).
Common mode (CM): flows in the same direction on both lines and returns through ground/parasitic capacitance (driven by dv/dt through parasitic capacitance to the heat sink or chassis).

Radiated EMI comes from loops (di/dt) acting as magnetic antennas and from nodes with high dv/dt acting as electric antennas.

Mitigation:

Minimise loop areas, and use tight, low-inductance layout and a solid ground plane.
Input filters: X capacitors (line-to-line), Y capacitors (line-to-ground), DM inductors, CM chokes.
Slower edges where efficiency permits (gate resistor), snubbers, and soft switching.
Spread-spectrum (frequency dithering) modulation.
Shielding, and shielded cables with proper termination.
Measurement with a LISN (line impedance stabilisation network) and a spectrum analyser.

Standards: CISPR 11/32, FCC Part 15, EN 55032.

Part 11: Applications

11.1 Switch-mode power supplies (SMPS)

Almost all electronics are powered by SMPS: AC-DC adapters, PC and server supplies, LED drivers, and telecom rectifiers. A typical offline supply has an EMI filter, rectifier, PFC boost stage, isolated DC-DC stage (flyback for low power, LLC for higher power), and a synchronous rectifier output. Efficiency standards (80 PLUS Titanium, ENERGY STAR, DoE Level VI) push designs to 94–98%.

11.2 Motor drives

Power electronics gives efficient variable-speed control of AC motors, saving 20–50% of energy in fans and pumps compared with throttling or dampers. Typical structure: rectifier → DC link → PWM inverter (VFD), with FOC or V/f control. Applications: HVAC, pumps, conveyors, machine tools, robots, elevators, appliances, and electric traction.

11.3 Uninterruptible power supplies (UPS)

Offline (standby): the load is on mains, and switches to the inverter on failure.
Line-interactive: adds voltage regulation (autotransformer) and a bidirectional converter.
Online (double conversion): rectifier → battery/DC link → inverter continuously feeds the load. It offers the best isolation and power quality, with efficiency in the 94–97% range.

11.4 Renewable energy

Solar PV: array → MPPT DC-DC stage → inverter → grid. Architectures include string inverters, central inverters, microinverters, and DC optimisers. Transformerless designs (H5, HERIC, NPC topologies) reach 98–99% efficiency while limiting leakage current.

Wind: doubly-fed induction generators (a partially rated back-to-back converter on the rotor) or full-scale converters with permanent-magnet or synchronous generators.

Energy storage: bidirectional DC-DC and DC-AC converters for batteries, with BMS coordination.

11.5 Electric vehicles and charging

Traction inverter: IGBT or SiC, hundreds of kW, driving a PMSM or induction motor. SiC raises range through lower losses.
Onboard charger (OBC): AC-DC with PFC, followed by an isolated DC-DC (LLC/DAB), often bidirectional (V2G, V2H).
DC-DC converter: high-voltage battery to 12/48 V auxiliary systems.
DC fast chargers: modular AC-DC/DC-DC stages from tens of kW to several hundred kW, with 800 V architectures growing.
Wireless charging: high-frequency resonant inverter, coupled coils, rectifier.

11.6 High-voltage transmission and grid applications

HVDC: Line-commutated converters (LCC) with thyristors for very high power and long distance; voltage-source converters (VSC, MMC) with IGBTs offer black-start capability, independent P/Q control, and multi-terminal grids.
FACTS devices: SVC (thyristor-controlled reactors and capacitors), STATCOM (VSC-based reactive power compensation), TCSC, UPFC. They control power flow and voltage on AC networks.
Solid-state transformers (SSTs): medium-voltage AC → high-frequency isolation → low-voltage AC/DC, offering controllability and integration of storage and DC loads.
Microgrids and DC distribution: DC buses for data centres, buildings, ships, and aircraft.

11.7 Other applications

Induction heating and melting, arc welding, electroplating and electrolysis (large rectifiers), LED lighting, lasers and pulsed power, medical imaging power supplies (X-ray, MRI gradient amplifiers), railway traction, marine propulsion, aerospace (more-electric aircraft), and consumer devices.

Part 12: Protection, Reliability and Standards

12.1 Protection

Overcurrent / short circuit: fast fuses, desaturation detection, shunt or Hall-sensor trips, current-limit modes. For SiC, protection must act within 1–3 µs because of small short-circuit withstand times.
Overvoltage: clamp circuits, MOVs, TVS diodes, crowbars, and DC-link chopper/brake resistors.
Overtemperature: NTC sensors and thermal derating.
Undervoltage lockout (UVLO) for drive and control supplies.
Inrush limiting: NTC thermistors or a bypassed precharge resistor to charge the DC-link capacitor gently.
dv/dt and di/dt protection: snubbers and series inductance.
Galvanic isolation and safety: creepage and clearance distances, insulation coordination, and earthing, per standards such as IEC 62477-1 and IEC 60950/62368.

12.2 Reliability

Typical failure mechanisms: electrolytic capacitor wear-out, bond-wire lift-off and solder fatigue (from thermal cycling, “power cycling”), gate-oxide degradation, cosmic-ray-induced failures in high-voltage devices, and thermal runaway. Design for reliability by derating voltage and temperature, reducing temperature swings, using robust packaging, applying condition monitoring, and validating with accelerated life tests (HTRB, HTGB, power cycling, thermal shock, HAST).

12.3 Design and simulation workflow

Specify: input/output ranges, power, efficiency, size, cost, standards.
Choose topology and switching frequency.
Select devices and design magnetics and capacitors.
Simulate (SPICE/LTspice, PLECS, MATLAB/Simulink, PSIM), from ideal to detailed models with parasitics.
Design control and compensation; verify with hardware-in-the-loop where needed.
Lay out the PCB with a focus on power loops, gate loops, grounding, and thermal paths.
Prototype, then measure efficiency, waveforms, thermal, EMI, and transient response.
Certify against safety and EMC standards.

Part 13: Worked Examples

Example 1: Buck converter design

Specification: V_in = 48 V, V_o = 12 V, I_o = 5 A, f_s = 100 kHz, inductor ripple 20% of I_o, output ripple ≤ 50 mV.

Duty cycle: D = V_o/V_in = 12/48 = 0.25
Ripple current: ΔI_L = 0.2 × 5 = 1 A
Inductor: L = V_o(1 − D)/(f_s · ΔI_L) = 12 × 0.75 / (100 × 10³ × 1) = 90 µH
Peak inductor current = 5 + 0.5 = 5.5 A (so choose a core that does not saturate at more than 5.5 A, with margin)
Capacitor: C = ΔI_L/(8 f_s ΔV_o) = 1/(8 × 10⁵ × 0.05) = 25 µF (minimum; ESR must be low enough that ΔI_L × ESR is well under 50 mV, so use a larger ceramic bank in practice)

Example 2: Boost converter design

Specification: V_in = 12 V, V_o = 36 V, P_o = 72 W, f_s = 50 kHz, inductor ripple 30%, output ripple 0.5 V.

Duty cycle: D = 1 − V_in/V_o = 1 − 12/36 = 0.667
I_o = 72/36 = 2 A; input current (ideal) = 72/12 = 6 A
ΔI_L = 0.3 × 6 = 1.8 A
Inductor: L = V_in · D/(f_s · ΔI_L) = 12 × 0.667/(50 × 10³ × 1.8) ≈ 89 µH
Capacitor: C = I_o · D/(f_s · ΔV_o) = 2 × 0.667/(50 × 10³ × 0.5) ≈ 53 µF
Peak inductor current = 6 + 0.9 = 6.9 A

Example 3: Single-phase fully controlled rectifier

A single-phase fully controlled bridge is fed from 230 V rms, with a highly inductive load drawing a constant 10 A, and α = 60°.

V_m = 230√2 = 325.3 V
V_dc = (2V_m/π) cos α = (2 × 325.3/π) × 0.5 = 207.1 × 0.5 ≈ 103.5 V
Output power = 103.5 × 10 = 1035 W
Source apparent power = 230 × 10 = 2300 VA
Power factor = 1035/2300 = 0.45 (matches 0.9 × cos 60° = 0.45)

This shows how phase control costs power factor as α grows.

Example 4: Three-phase inverter output voltage

DC link V_dc = 400 V.

SPWM, m_a = 0.8: V_LL,rms = 0.612 × 0.8 × 400 ≈ 196 V
SVPWM at its linear limit: V_LL,rms = 400/√2 ≈ 283 V (15.5% above the SPWM limit of 245 V)
Six-step: fundamental V_LL,rms = 0.78 × 400 ≈ 311 V

Example 5: MOSFET losses and junction temperature

A MOSFET switches 400 V, 10 A at 100 kHz with t_r + t_f = 40 ns, R_ds(on) = 0.1 Ω (hot), duty cycle 0.5. Thermal resistances: R_θjc = 1, R_θcs = 0.5, R_θsa = 3 K/W. Ambient = 40 °C.

Switching loss: ½ × 400 × 10 × 40 × 10⁻⁹ × 10⁵ = 8 W
Conduction loss: I²R_ds(on)·D = 100 × 0.1 × 0.5 = 5 W
Total ≈ 13 W (plus gate-drive loss, small)
T_j = 40 + 13 × (1 + 0.5 + 3) = 40 + 58.5 ≈ 98.5 °C

If the frequency doubled, switching loss would double to 16 W, giving a total of 21 W and T_j ≈ 134.5 °C, which is close to typical derating limits. This is why frequency, device choice, and cooling are always co-optimised.

Part 14: Trends and the Future

Wide-bandgap adoption: SiC dominates high-voltage EV and solar. GaN is expanding upward in voltage and power, with integrated drivers and monolithic half-bridges. Vertical GaN and gallium oxide (Ga₂O₃) are emerging research areas.
Higher power density: integration of magnetics, planar transformers, embedded components, and advanced cooling (double-sided, liquid).
Digital and smart power: integrated sensing, digital twins, condition monitoring, self-diagnosing drivers, and AI-assisted design and control.
Grid transformation: grid-forming inverters, HVDC networks, solid-state transformers, DC microgrids, hybrid AC/DC data centres (800 V DC distribution), and solid-state circuit breakers.
Electrification of transport: 800 V+ EV architectures, ultra-fast and bidirectional charging, electric aviation and shipping.
Sustainability: higher efficiency, recyclable design, longer lifetimes, and reduced material use.

Quick Formula Sheet

Waveform basics

FF = V_rms/V_avg; RF = √(FF² − 1)
PF = (P/S) = cos φ₁ · I₁/I_rms; THD = √(I_rms² − I₁²)/I₁

Rectifiers

1φ half-wave (R): V_dc = V_m/π
1φ full-wave: V_dc = 2V_m/π
1φ full-controlled (inductive load): V_dc = (2V_m/π) cos α
3φ six-pulse uncontrolled: V_dc = 1.35 V_LL
3φ six-pulse controlled: V_dc = 1.35 V_LL cos α
Overlap drop (3φ bridge): ΔV = 3ωL_sI_d/π

DC-DC (CCM)

Buck: V_o = D·V_in
Boost: V_o = V_in/(1 − D)
Buck-boost: V_o = −V_in · D/(1 − D)
Flyback: V_o = N · V_in · D/(1 − D)
Forward: V_o = N · D · V_in
Buck ripple: ΔI_L = V_o(1 − D)/(L f_s); ΔV_o = ΔI_L/(8 f_s C)
Boost ripple: ΔI_L = V_in D/(L f_s); ΔV_o = I_o D/(f_s C)

Inverters

1φ square wave: V_o1 = 0.9 V_dc (rms)
3φ six-step: V_LL1 = 0.78 V_dc (rms)
3φ SPWM: V_LL,rms = 0.612 · m_a · V_dc (m_a ≤ 1)
3φ SVPWM max: V_LL,rms = 0.707 V_dc

AC controller (1φ, R load)

V_o = V_s √[(1/π)(π − α + sin2α/2)]

Devices and thermal

P_sw ≈ ½ V I (t_r + t_f) f_s
P_g = Q_g V_gs f_s
T_j = T_a + P(R_θjc + R_θcs + R_θsa)
Skin depth: δ = √(ρ/(πfμ))

Conclusion

Power electronics turns raw electrical power into whatever form a load needs, efficiently and under precise control. Its foundation is small: switch fast, keep losses low, and use inductors and capacitors to store and smooth energy. From that come rectifiers, choppers, inverters, and AC controllers, and from those come today’s most important technologies: variable-speed drives, renewable energy, electric vehicles, data centres, and HVDC grids.

Progress comes from three areas: better devices (silicon to SiC and GaN), better magnetics and packaging, and smarter digital control. A good power electronics engineer combines circuit theory, semiconductor physics, magnetics, thermal design, control, and EMC. Natural next steps are electrical drives (vector control in depth), grid-connected converter control, magnetics design, and EMC design.

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